Qwen3-Coder 30B-A3B on NVIDIA DGX H200 (8x H200, 1,128 GB)

1. Multi-GPU: 4800 GB/s per card, with each additional card contributing 90% of its bandwidth — 35040 GB/s effective, not the 38400 GB/s aggregate. NVSwitch / 4th-generation NVLink, 900 GB/s per GPU carries cross-GPU collectives.
2. Decode: reading 3.3B active parameters at 8.50 bits/weight takes 0.13 ms at 35040 GB/s x 78% achieved efficiency.
3. MoE routing penalty of 15% applied: expert gathers are less bandwidth-efficient than a dense sweep.
4. Per-token overhead of 1.4 ms (kernel launches, attention bookkeeping, sampling) is significant here — this model is not purely bandwidth-bound on this hardware.
5. Prefill: 15832 TFLOPS (FP16) x 2 for native FP8 tensor cores x 26% assumed model-FLOPs utilisation, divided by 2 x 10.0B parameters per token.
6. Prefill uses 10.0B effective parameters, not the 3.3B active in decode: a batch of hundreds of tokens routes across most of the expert pool.

• MoE decode depends on how well the engine batches expert gathers; real results vary more than for dense models.
• With few active parameters on fast memory, fixed per-token overhead rather than bandwidth sets the ceiling. Real engines vary widely in how well they hide it.
• Prefill throughput is highly engine-dependent. Flash attention, batch size and quantized KV all move this number substantially, and for sparse mixture-of-experts models it is the least reliable figure we produce.
• This is a calculated estimate, not a measurement. It assumes a single request, a short prompt, no speculative decoding and a warm model already resident in memory.

Estimator version estimator_v1. Stored with every estimated row so old estimates can be regenerated when the model improves.